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Emerging Trends and Design Paradigms for Memory Systems and Storage

IEEE Transactions on Emerging Topics in Computing  
Special Issue/Section, Second Issue of 2017

https://www.computer.org/web/tetc


CALL FOR PAPERS
Scope -- Submissions -- Key Dates -- Additional Information 

Scope


The continuing scaling of silicon-based microelectronic technology, as well as the emergence of new, non-silicon-based technologies, enable increasing system complexity and performance, paving the way to applications which had been unthinkable a few years ago. At the same time, an ever-increasing amount of data needs to be stored and accessed quickly, posing new challenges to memory systems and storage elements. 

IEEE Transaction on Emerging Topics in Computing (TETC) seeks original manuscripts for a Special Issue/Section on Emerging Trends and Design Paradigms for Memory Systems and Storage covering the entire spectrum of relevant research activities, from manufacturing to test, which is scheduled to appear in the second issue of 2017. All aspects of manufacturing, design, test, reliability, resilience and availability of memory systems and storage are of interest, including but not limited to:

  • Emerging Technologies: techniques for resistive, spin-based, phase-change, and bulk-switching memories
  • Yield Analysis/Modeling: defect/fault analysis/models; statistical yield and prediction modeling.
  • Memory Design: bit cells, array/sensing structures, statistical design and margining, interaction of volatile and non-volatile memory
  • Memory System Design: interfaces, compute in/near memory, caching structures
  • Test and Design for Testability: test algorithms; test and variability, interaction of design margins and test, Built-In Self-Test, interfaces, interconnect fabric, NoC, FPGA, SoC, CPU, GPU
  • Error Detection, Correction, and Recovery: self-checking solutions, error-correcting codes, fault masking and avoidance, recovery schemes, redundancy, reconfiguration, resilient design
  • Dependability Analysis and Validation: fault injection techniques, dependability characterization

Submissions

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Submitted articles must not have been previously published or currently submitted for journal publication elsewhere. 

An extended version of the article appearing in any conference proceedings can be submitted provided that it has substantially new content w.r.t. to the original conference version. The conference paper must be cited in the main text and the cover letter must clearly describe the differences with the conference version and clearly identify the new contributions. 

As an author, you are responsible for understanding and adhering to our submission guidelines; you can access them at the IEEE Computer Society web site, www.computer.org . Please submit your paper to Manuscript Central at https://mc.manuscriptcentral.com/tetc-cs . Please note the following important dates.

Key Dates

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Please observe the following key dates:

  • Submission Deadline: June 1, 2016
  • Reviews Completed: August 15, 2016
  • Major Revisions Due (if Needed): October 1, 2016
  • Reviews of Revisions Completed (if Needed): November 1, 2016 
  • Minor Revisions Due (if Needed): December 1, 2016
  • Notification of Final Acceptance: February 1, 2017
  • Publication Materials for Final Manuscripts Due: March 1, 2017 
  • Publication date: Second Issue 2017 (June Issue)
Additional Information
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Please address all other correspondence regarding this special Issue/Section to the Guest Editors.

Rob Aitken (ARM) – rob.aitken@arm.com
Cecilia Metra (University of Bologna) – cecilia.metra@unibo.it



For more information, visit us on the web at: https://www.computer.org/web/tetc

The IEEE Transactions on Emerging Topics in Computing   is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).


IEEE Computer Society- Test Technology Technical Council

TTTC CHAIR 
Chen-Huan CHIANG 
Alcatel-Lucent - USA
Tel. +1-973-386-6759
E-mail chenhuan@alcatel-lucent.com

PAST CHAIR 
Michael NICOLAIDIS 
TIMA Laboratory - France 
Tel. +33-4-765-74696 
E-mail michael.nicolaidis@imag.fr

TTTC 1ST VICE CHAIR 
Matteo SONZA REORDA
Politecnico di Torino - Italy
Tel.+39 090 7055
E-mail matteo.sonzareorda@polito.it

SECRETARY
Joan FIGUERAS
Un. Politec. de Catalunya - Spain
Tel. +34-93-401-6603
E-mail figueras@eel.upc.es

ITC GENERAL CHAIR 
Michael Purtell
Intersil 
- USA 
Tel. +1-408-372-6015 
E-mail m.purtell@ieee.org

TEST WEEK COORDINATOR
Yervant ZORIAN 
Synopsys, Inc.  USA 
Tel. +1-650-584-7120  
E-mail Yervant.Zorian@synopsys.com

TUTORIALS AND EDUCATION
Paolo BERNARDI
 
Politecnico di Torino
 - Italy
Tel. +39-011-564-7183
E-mail paolo.bernardi@polito.it

STANDARDS
Rohit KAPUR

Synopsys
, Inc. - USA
Tel. +1-650-934-1487
E-mail rkapur@synopsys.com

EUROPE
Giorgio DI NATALE
LIRMM - France
Tel. +33-467-41-85-01
E-mail giorgio.dinatale@lirmm.fr

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut - Lebanon
Tel. +961-1-341-952
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES 
André IVANOV 
University of British Columbia - Canada 
Tel. +1-604-822-6936 
E-mail ivanov@ece.ubc.ca

ELECTRONIC MEDIA 
Giorgio DI NATALE
LIRMM - France
Tel. +33-467-41-85-01
E-mail giorgio.dinatale@lirmm.fr

 

PRESIDENT OF BOARD 
Yervant ZORIAN
Synopsys, Inc.  USA 
Tel. +1-650-584-7120  
E-mail Yervant.Zorian@synopsys.com

SENIOR PAST CHAIR 
André IVANOV 
University of British Columbia - Canada 
Tel. +1-604-822-6936 
E-mail ivanov@ece.ubc.ca

TTTC 2ND VICE CHAIR 
Rohit KAPUR
 
Synopsys, Inc. 
USA
Tel. +1-650-934-1487
E-mail rkapur@synopsys.com

FINANCE 
Chen-Huan CHIANG
Alcatel-Lucent - USA
E-mail chen-huan.chiang@alcatel-lucent.com

IEEE DESIGN & TEST EIC 
André IVANOV
U. of British Columbia Canada 
Tel. +1 
E-mail ivanov@ece.ubc.ca

TECHNICAL MEETINGS 
Chen-Huan CHIANG 
Alcatel-Lucent
 - USA
Tel. +1-973-386-6759
E-mail chenhuan@alcatel-lucent.com

TECHNICAL ACTIVITIES 
Matteo SONZA REORDA
Politecnico di Torino Italy
Tel.+39 090 7055
E-mail matteo.sonzareorda@polito.it

ASIA & PACIFIC 
Kazumi HATAYAMA
NAIST - Japan
Tel.+81-743-72-5221 
E-mail k-hatayama@is.naist.jp

LATIN AMERICA 
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica - Mexico
Tel.+52-22-470-517
E-mail champac@inaoep.mx

NORTH AMERICA 
André IVANOV 
University of British Columbia - Canada 
Tel. +1-604-822-6936 
E-mail ivanov@ece.ubc.ca

COMMUNICATIONS
Cecilia METRA 
Università di Bologna - Italy
Tel. +39-051-209-3038 
E-mail cmetra@deis.unibo.it

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Synopsys, Inc.  USA 
Tel. +1-650-584-7120  
E-mail Yervant.Zorian@synopsys.com





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